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Abstract

As of late, the anti-symmetric product coding (APC) and odd-multiple-storage (OMS) strategies for lookup table (LUT) outline for memory-based multipliers to be utilized in computerized flag preparing applications. The proposed joined approach gives a decrease in query table size to one-fourth of the customary query table. We present an alternate type of Anti-symmetric item coding and a changed Odddifferent capacity conspires, with a specific end goal to consolidate them for effective memory- based duplication. It is discovered to the future query table-based multiplier includes practically identical area and instance intricacy for a phrase size of 8 bits, it includes essentially less region and less increase time than that of the authoritative marked digit-based multipliers, For 16-and 32-bit word sizes, individually, and it offers more than 20- 30% and 40-50%of sparing in area - delay item over the relating accepted digit (CSD) multipliers.

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How to Cite
P.Geethamani, G.Preethi, D.Lavanya, & V.Sreesureya. (2019). Implementation of memory based multipliers for LUT optimization . International Journal of Intellectual Advancements and Research in Engineering Computations, 7(2), 2019–2024. Retrieved from https://ijiarec.com/ijiarec/article/view/1065