Design of area efficient fault tolerant parallel FFTS using partial summation and parallel correction

Abstract

In signal processing and communication systems, digital filters are widely used. It is common to find several filters or FFTs operating in parallel. In some cases, soft errors pose a reliability threat to modern electronic circuits. Fault tolerant filter implementation needed. Several protection schemes have been proposed to detect and correct errors in FFTs. for some applicationABFT techniques used. The error it can be detected and corrected by using algorithmic properties, signal processing and communication applications are well suited for ABFT.In this brief, initially this technique is first applied to protect FFTs then the improved protection schemes that combine the use of ECC and Parseval checks are proposed and evaluated for the multiple error corrections. The result shows that the new schemes can further reduce the implementation cost and provide low complexity