DHIVYA BHARATHI RAJENDIRAN; PARIMALADEVI MUTHUSAMY; DR.BRINDHA PALANISAMY. Design of an optimized multiplier based on approximation logic . International Journal of Intellectual Advancements and Research in Engineering Computations, [S. l.], v. 6, n. 1, p. 80–85, 2018. DOI: 10.61096/ijiarec.v6.iss1.2018.80-85. Disponível em: https://ijiarec.com/ijiarec/article/view/412. Acesso em: 7 nov. 2026.