P.GEETHAMANI; G.PREETHI; D.LAVANYA; V.SREESUREYA. Implementation of memory based multipliers for LUT optimization . International journal of intellectual advancements and research in engineering computations, [S. l.], v. 7, n. 2, p. 2019–2024, 2019. DOI: 10.61096/ijiarec.v7.iss2.2019.2019-2024. Disponível em: https://ijiarec.com/ijiarec/article/view/1065. Acesso em: 17 apr. 2026.